View NL128102AC2302_641747.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

DATA SHEET
TFT COLOR LCD MODULE
NL128102AC23-02
39 cm (15.4 inches), 1280 x 1024 pixels, Full-color, Wide viewing angle Multi-scan Function
DESCRIPTION
NL128102AC23-02 is a TFT (thin film transistor) active matrix color liquid crystal display (LCD) comprising amorphous silicon TFT attached to each signal electrode, a driving circuit and a backlight. NL128102AC23-02 has a built-in backlight with an inverter. The 39 cm (15.4 inches) diagonal display area contains 1280 x 1024 pixels and can display full-color (more than 16 million colors simultaneously). Also, it has multi-scan function.
FEATURES
* Wide viewing angle (with retardation film) * High luminance and low reflection * Multi-scan function: e.g., SXGA, XGA, SVGA, VGA, VGA-TEXT, MAC * Incorporated edge type backlight with an inverter (Four lamps into two lamp holders) * Lamp holder replaceable
APPLICATIONS
* Desk-top type of PC * Engineering work station * Display terminals for control system
On Screen Display Regarding the use of OSD, please note that there is possibility of conflicts with a patent in Europe and the U.S. Thus, if such conflict might happen when you use OSD, we shall not be responsible for any trouble.
The information in this document is subject to change without notice. Please confirm with the delivery specification before starting to design the system.
Document No. EN0491EJ1V0DS00 (1st edition) Date Published December 1999 P Printed in Japan
(c)
1999
NL128102AC23-02
STRUCTURE AND FUNCTIONS A color TFT (thin film transistor) LCD module is comprised of a TFT liquid crystal panel structure, LSIs for driving the TFT array, and a backlight assembly. The TFT panel structure is created by sandwiching liquid crystal material in the narrow gap between a TFT array glass substrate and a color filter glass substrate. After the driver LSIs are connected to the panel, the backlight assembly is attached to the backside of the panel. RGB (red, green, blue) data signals from a source system is modulated into a form suitable for active matrix addressing by the onboard signal processor and sent to the driver LSIs which in turn addresses the individual TFT cells. Acting as an electro-optical switch, each TFT cell regulates light transmission from the backlight assembly when activated by the data source. By regulating the amount of light passing through the array of red, green, and blue dots, color images are created with clarity.
BLOCK DIAGRAM
I/F LCD module
R G B Hsync Vsync CLK CLAMP CPSEL CNTDAT CNTCLK CNTSTB CNTSEL OSDENI OSDRI OSDGI OSDBI ADJSEL CNTSTB2
AIF
AMP
Timing Controller
H-driver
3840 dots LCD panel
V-driver
POWC VDD (+12 V)
ON/OFF
1024 lines H: 1280 x 3 (R, G, B) V: 1024
DC/DC converter VDDB (+12 V) BRTC BRTH BRTL ACA BRTP PWSEL
GNDB GND
Backlight
Inverter
Note Neither GND nor GNDB is connected to Frame.
2
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
OUTLINE OF CHARACTERISTICS (at room temperature) Display area Drive system Display colors Number of pixels Pixel arrangement Pixel pitch Module size Weight Contrast ratio 305.28 (H) x 244.224 (V) mm a-Si TFT active matrix Full-color 1280 x 1024 pixels RGB vertical stripe 0.2385 (H) x 0.2385 (V) mm 350.0 (H) x 284.8 (V) x 21.0 (typ.) (D) mm 1560 g (typ.) 200 : 1 (typ.) Horizontal : 60 (typ., left side, right side) Vertical Color gamut Response time Luminance Signal system Supply voltages Backlight : 50 (typ., up side), 45 (typ., down side) 59% (typ., at center, to NTSC) 7 ms (typ.), white 100% to black 100%
2 200 cd/m (typ.)
Viewing angle (more than the contrast ratio of 10 : 1)
Analog RGB signals, Synchronous signals (Hsync and Vsync), Dot clock (CLK) 12 V (Logic/LCD driving), 12 V (Backlight) Edge light type: Four cold cathode fluorescent lamps with an inverter * Lamp holder: type No. 154LHS02 * Inverter: type No. 154PW021
Power consumption
26.4 W (typ.)
Data Sheet EN0491EJ1V0DS00
3
NL128102AC23-02
GENERAL SPECIFICATIONS
Item Module size Display area Number of dots Number of pixels Dot pitch Pixel pitch Pixel arrangement Display colors Weight Specification 350.0 0.6 (H) x 284.8 0.6 (V) x 21.5 (MAX.) (D) 305.28 (H) x 244.224 (V) 1280 x 3 (H) x 1024 (V) 1280 (H) x 1024 (V) 0.0795 (H) x 0.2385 (V) 0.2385 (H) x 0.2385 (V) RGB (Red, Green, Blue) vertical stripe full color 1620 (max.) Unit mm mm dot pixel mm mm - color g
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Symbol VDD VDDB Logic input voltage R,G,B input voltage CLK input voltage BRTL input voltage Storage temp. Operating temp. Humidity Vin1 Vin2 Vin3 Vin4 TST TOP 95% relative humidity 85% relative humidity Absolute humidity shall not exceed Ta = 50C, 85% relative humidity level. Rating -0.3 to +14 -0.3 to +14 -0.3 to +5.5 -6.0 to +6.0 -7.0 to +7.0 -0.3 to + 1.5 -20 to + 60 0 to +50 Unit V V V V V V C C Module surface Ta 40C 40 < Ta 50C Ta > 50C - Note 1 No condensation Ta = 25C VDD = 12 V Ta = 25C Remarks
Note 1:
Measured at the LCD panel
4
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
ELECTRICAL CHARACTERISTICS (1) Logic, LCD driving, Backlight Ta = 25C
Parameter Supply voltage Symbol VDD VDDB Logic input "L" voltage 1 Logic input "H" voltage 1 VIL VIH MIN. 11.4 11.4 0 2.0 TYP. 12.0 12.0 - - MAX. 12.6 12.6 0.8 5.25 Unit V V V V Remarks for logic and LCD driving for backlight Hsync/Csync, Vsync, SEL, UP, DOWN, EXIT, VOLSEL, DDCDAT, DDCCLK, OSDSEL, WPRT, MENUSEL Logic except BRTP
Logic input "L" voltage 2 Logic input "H" voltage 2 CLK input voltage CLK DC input voltage Logic input "L" current 1 Logic input "H" current 1 Logic input "L" current 2 Logic input "H" current 2 Logic input "L" current 3 Logic input "H" current 3 Logic input "L" current 4 Logic input "H" current 4 Logic input "L" current 5 Logic input "H" current 5 Supply current Note 1
ViL2 ViH2 ViCLK ViDCCLK IiL1 IiH1 IiL2 IiH2 IiL3 IiH3 IiL4 IiH4 IiL5 IiH5 IDD
0 2.0 0.6 -4.5 -1 - - -1 -10 - -1.0 - -1.0 - -
- - - - - - - - - - - - - - 1000
0.8 5.25 1.0 +4.5 - 1 1 - - 1400 - 10 - 0.8 1500
V V Vp-p V
for CLK
A A A A A A
mA mA mA mA mA
Hsync/Csync, Vsync
DDCDAT
for CNTDAT, CNTSTB, CNTCLK, CLAMP, OSDENI, OSDRI, OSDGI, OSDBI, ADJSEL, CNTSTB2 for BRTP
for ACA, BRTC, PWSEL, BRTL
for LCD driving VDD = 12.0 V for back light VDDB = 12.0 V (max. luminance)
IDDB
-
1400
1600
mA
Note 1:
The display is Dot-checkered pattern.
(2) CLK input equivalent circuit
1000 pF CLK 510
Data Sheet EN0491EJ1V0DS00
5
NL128102AC23-02
(3) Video signal (R,G,B) input Ta = 25C
Item Maximum amplitude (white - black) MIN. 0 (black) -3.5 TYP. 0.7 (white) - MAX. 0.9 Unit Vp-p Remarks Need to adjust contrast if input more 0.7 Vp-p -
DC input level (black)
+3.5
V
6
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
POWER SUPPLY SEQUENCE
CAUTION Wrong power sequence may damage the module. Logic signals POWC VDD Time 200 ms 100 ms 0< 0< Note 1
Voltage
Note 1: Synchronous signals, Control signals, CLK (1) Logic signals (synchronous signals and control signals) should be "0" voltage (V), when VDD is not input. If input voltage to signal lines is higher than 0.3 V, the internal circuit will be damaged. (2) LCD module will shut down the power supply of driving voltage to LCD panel internally, when one of CLK, Hsync, and Vsync is not input more than 90 ms typically. As the display data are unstable in this period, the display maybe disordered. But the backlight works correctly even this period. So the backlight should be controlled by BRTC signal. (3) The backlight ON/OFF (BRTC signal) should be controlled while logic signals are supplied. The backlight power supply (VDDB) is not related to the power supply sequence. However, unstable data will be displayed when the backlight power is turned ON with no logic signals. (4) Keep POWC signal "L" more than 200 ms after the power supply (VDD) is input, if POWC signal is conrolled. (5) Analog RGB inputs are independent from this power supply sequence. (6) Ripple of supply voltage
VDD (for logic and LCD driver) Acceptable range 100 mVp-p VDDB (for backlight) 200 mVp-p
Note 1:
The acceptable range of ripple voltage includes spike noise.
Example of the power supply connection a) Separate the power supply
Power Power VDD VDDB
b) Put the filter
Power Filter VDD
Filter
VDDB
Data Sheet EN0491EJ1V0DS00
7
NL128102AC23-02
(7) Inverter current wave
Filter NEC inverter
Power supply
to VDD
1400 mA (typ.) Spike current
GND Duty
270 Hz (typ., frequency of luminance control)
In the maximum luminance, the inverter current is DC. However, in the luminance control by BRTP signal, the above duty varies 100% to 20% and the spike current, which causes the noise on the screen, may be observed. In this case, adjust the value of the capacitance in the above filter to eliminate the noise on the screen.
8
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
INTERFACE PIN CONNECTION CN1 Part No. Supplier Coaxial cable Supplier : MRF03-6R-SMT : HIROSE ELECTRIC CO., LTD. (coaxial type) : UL20537PF75VLAS : HITACHI CO., LTD. Adaptable socket : MRF03-6P-1.27 (For cable type) or MRF03-6PR-SMT (For board to board type)
Note 1: A coaxial cable shield should be connected with GND.
Pin No. 1 2 3 Symbol B G R Pin No. 4 5 6 Symbol Vsync Hsync CLK
Figure from socket view
1 2 ****** 5 6
CN2 Part No. Supplier
Pin No. 1 2 3 4 5 6 7 8
: IL-Z-15PL-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol VDD VDD GND GND POWC CNTSEL CNTDAT CNTSTB Pin No. 9 10 11 12 13 14 15 Symbol GND CNTCLK CPSEL CLAMP GND N.C. GND
15 14 * * * *2 1
Adaptable socket : IL-Z-15S-S125C3
Figure from socket view
Note 1:
N.C. (No connection) must be open.
Data Sheet EN0491EJ1V0DS00
9
NL128102AC23-02
CN3 Part No. Supplier
Pin No. 1 2 3 4 5 6 7 8 9 10
: DF14A-20P-1.25H : HIROSE ELECTRIC CO., LTD. (coaxial type)
Symbol GND OSDENI GND OSDBI GND OSDGI GND OSDRI GND N.C. Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol ADJSEL N.C. CNTSTB2 GND N.C. GND N.C. N.C. N.C. N.C.
1 2 * * * 19 20
Adaptable socket : DF14-20S-1.25C
Figure from socket view
CN201 Part No. Supplier
Pin No. 1 2 3 4 5 6
: IL-Z-11PL-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol VDDB VDDB VDDB GNDB GNDB GNDB Pin No. 7 8 9 10 11 Symbol ACA BRTC BRTH BRTL N.C.
11 10 ***** 2 1
Adaptable socket : IL-Z-11S-S125C3
Figure from socket view
Note 1: CN202 Part No. Supplier
Pin No. 1 2 3 4 5
N.C. (No connection) must be open.
: IL-Z-9PL1-SMTY : Japan Aviation Electronics Industry Limited (JAE)
Symbol GNDB GNDB ACA BRTC BRTH Pin No. 6 7 8 9 Symbol BRTL BRTP GNDB PWSEL
9 8 ***** 2 1
Adaptable socket : IL-Z-9S-S125C3
Figure from socket view
10
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
Rear view
1 CN1 1 9 1 15 CN2 11 CN201 1 1 CN3 20 CN202 6
Data Sheet EN0491EJ1V0DS00
11
NL128102AC23-02
PIN FUNCTIONS
Symbol CLK Hsync Vsync R G B POWC I/O Input Input Input Input Input Input Input Logic Negative Negative Negative - - - Positive Description Dot clock input. (ECL level) Timing signal for display data. Horizontal synchronous signal input (TTL level) Vertical synchronous signal input (TTL level) Red video signal input (0.7 Vp-p, 75 ) Green video signal input (0.7 Vp-p, 75 ) Blue video signal input (0.7 Vp-p, 75 ) Power control signal (TTL level) "H" or "open" : Logic and LCD powers are on. "L" : Logic and LCD powers are off. (Note 1) Display control signal in case of serial communications. (TTL level) "H" or "Open": Default "L" : External control Serial communications are set up by external control. Display control data (TTL level) Detail of CNTDAT is mentioned in FUNCTIONS. CLK for display control data (TTL level) Detail of CNTCLK is mentioned in FUNCTIONS. Latch pulse for display control data (TTL level) Detail of CNTSTB is mentioned in FUNCTIONS. Clamp function select signal (TTL level) "H" or "Open": Default "L" : CLAMP signals is possible. (External control) Clamp timing signal of black level (TTL level) This mode works in CPSEL = "L." Luminance control signal (TTL level) "H" or "Open": Normal luminance "L" : Low luminance (1/2 of normal luminance) Backlight ON/OFF control signal (TTL level) "H" or "Open": Backlight on "L" : Backlight off Backlight luminance control-1 Variable resistor control (Note 2) or voltage control (Note 3) These controls work in BRTP = "Open." Backlight luminance control-2 (TTL level) BRTP signal control (Note 4) Luminance control select signal (TTL level) "H" or "Open": Variable resistor control or voltage control "L" : BRTP signal control Contrast, brightness control signal (TTL level) "H" or "Open": Default "L" : External control Serial communications are set up by external control. Latch pulse2 for display control data Detail of CNTDAT is mentioned in OSD FUNCTIONS. OSD Red input (TTL level) Detail of CNTDAT is mentioned in OSD FUNCTIONS. OSD Green input (TTL level) Detail of CNTDAT is mentioned in OSD FUNCTIONS.
Data Sheet EN0491EJ1V0DS00
CNTSEL
Input
-
CNTDAT
Input
Positive
CNTCLK
Input
Positive
CNTSTB
Input
Positive -
CPSEL
Input
CLAMP
Input
Negative
ACA
Input
Positive
BRTC
Input
Positive
BRTH BRTL BRTP
Input Input Input
- - - -
PWSEL
Input
ADJSEL
Input
Positive
CNTSTB2
Input
Positive - -
OSDRI
Input
OSDGI
Input
12
NL128102AC23-02
Symbol OSDBI I/O Input Logic - Description OSD Blue input (TTL level) Detail of CNTDAT is mentioned in OSD FUNCTIONS. OSD enable signal (TTL level) Detail of CNTDAT is mentioned in OSD FUNCTIONS. VDD (+12 V 5%) power supply for logic and LCD driving VDDB (+12 V 5%) power supply for backlight Signal ground for logic/LCD driving (VCC, VDD) (Connect to a system ground.) Ground for backlight (VDDB) GNDB is not connected the module GND (FG).
OSDENI
Input - - - -
Positive - - - -
VDD VDDB GND
GNDB
Note 1:
When POWC is "L", serial communication data is clear, please set again. When POWC is "L", logic input signal has to be all "0 V". If more than "0.3 V" is inputted, inside circuit of the LCD module may be broken.
Note 2:
The way of luminance control by a variable resistor This way works in PWSEL = "H" or "Open" and in BRTP = "Open". The variable resistor for luminance control should be 10 k type, and zero point of the resistor correspond to the minimum of luminance. Mating variable resistor:
BRTH R BRTL
10 k 5%, B curve
Maximum luminance (100%): R = 10 k Minimum luminance (30%; ACA = "H", 60%; ACA = "L"): R = 0 Note 3: The way of luminance control by voltage This way works in PWSEL = "H" or "Open" and in BRTP = "Open". If luminance is controlled by BRTH/BRTL input voltage, at first BRTH is "0 V", and BRTL input voltage controls luminance. When BRTL input voltage is "1 V", the luminance become maximum, and when BRTL input voltage is "0 V", the luminance become minimum. Maximum luminance (100%): BRTL = "1 V" Minimum luminance (30%; ACA = "H", 60%; ACA = "L"): BRTL = "0 V" Note 4: The way of luminance control by BRTP signal Refer to OUTSIDE CONTROL FOR LUMINANCE.
Data Sheet EN0491EJ1V0DS00
13
NL128102AC23-02
FUNCTIONS This LCD module has following functions by serial data input (table 1): (1) Expansion mode: (2) Control Display position (VERTICAL): (3) Control Display position (HORIZONTAL): (4) Control CLK delay: (5) Change CLK fall/rise synchronous: (6) Contrast control: (7) Sub-Contrast control: (8) Sub-Brightness control: Set up the following items to work the above functions (A) CLK counts of horizontal period: (B) CLK frequency range: HOW TO USE THE ABOVE FUNCTIONS If CNTSEL is "L", the above functions ((1) - (5)) are valid. (CNTSEL is "H" or open, default values are valid.) After serial data are transferred, the data is latched by CNTSTB. Once, the data is latched, the above functions ((1) - (5)) are effective. If ADJSEL is "L", the above functions ((6) - (8)) are valid. (ADJSEL is "H" or open, default values are valid.) After serial data are transferred, the data is latched by CNTSTB2. Once, the data is latched, the above functions ((6) - (8)) are effective. Please keep CNTSTB/2 to be "L" during transferring data. Input data can be changed during power on, but LCD display may be disturbed. When the serial data are changed, we recommend that the backlight power is off using BRTC function. See table 7. See table 8. See table 2 and EXPANSION FUNCTIONS See table 3. See table 6. See table 4. See table 5. See table 9, 10 and COLOR CONTROL FUNCTIONS AND GRAPH IMAGE
14
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
Table 1. CNTDAT (Serial data) Composition
DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 DATA name VEX3 VEX2 VEX1 VEX0 VD10 VD9 VD8 VD7 VD6 VD5 VD4 VD3 VD2 VD1 VD0 DELAY6 DALAY5 DALAY4 DALAY3 DALAY2 DALAY1 DALAY0 CKS HD8 HD7 HD6 HD5 HD4 HD3 HD2 HD1 HD0 HSE10 HSE9 HSE8 HSE7 HSE6 HSE5 HSE4 HSE3 Expansion mode Expansion mode Expansion mode Expansion mode Vertical display position (MSB) Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position Vertical display position (LSB) CLK delay (MSB) CLK delay CLK delay CLK delay CLK delay CLK delay CLK delay (LSB) CLK signal Horizontal display position (MSB) Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position Horizontal display position (LSB) CLK counts of horizontal period (MSB) CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period See table 7 See table 5 See table 6 See table 4 See table 3 Function See table 2
Data Sheet EN0491EJ1V0DS00
15
NL128102AC23-02
DATA D40 D41 D42 D43 D44 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 DATA name HSE2 HSE1 HSE0 MOD1 MOD0 DAD0 DAD1 DAD2 DAD3 DAD4 DAD5 DAD6 DAD7 DAA3 DAA2 DAA1 DAA0 CLK counts of horizontal period CLK counts of horizontal period CLK counts of horizontal period (LSB) CLK frequency select CLK frequency select Color adjust data (LSB) Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data Color adjust data (MSB) Color adjust select data (MSB) Color adjust select data Color adjust select data Color adjust select data (LSB) See table 10 See table 9 See table 8 Function See table 7
Table 2. Expansion mode (VEX3 to VEX0 : 4 bit)
VEX3 VEX2 VEX1 VEX0 Vertical magnification 1 1.25 1.6 2.0 2.5 - - - 1.1 - - - - - - - Display mode Display image
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
SXGA XGA SVGA, MAC VGA VGA-TEXT Prohibit Prohibit Prohibit SUN Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit
Standard
Note 1
See DISPLAY IMAGES.
Note 1:
Display mode is SXGA, when CNTSEL is "H" or "open."
16
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
Table 3. Vertical display position (VD10 to VD0 : 11 bit)
VD10 VD9 VD8 VD7 VD6 VD5 VD4 VD3 VD2 VD1 VD0 Vertical position [H] note 1 Prohibit Prohibit Prohibit Prohibit 4 5 * * * 2045 2046 2047 note 2
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 0 0 * * * 1 1 1
0 0 0 0 1 1 * * * 1 1 1
0 0 1 1 0 0 * * * 0 1 1
0 1 0 1 0 1 * * * 1 0 1
Note 1: Note 2: Note 3:
The number of horizontal line between Vsync-fall and RGB data valid. The maximum number is based on horizontal line count of the display mode. Vertical position is fixed at 41 H, when CNTCEL is "H" or "open".
Data Sheet EN0491EJ1V0DS00
17
NL128102AC23-02
Table 4. CLK delay (DELAY6 to DELAY0 : 7 bit)
DELAY [6..0] 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H 26H 27H Delay 0 0.36 0.67 0.98 1.32 1.63 1.95 2.27 2.52 2.83 3.14 3.45 3.79 4.1 4.42 4.73 5 5.31 5.62 5.93 6.27 6.58 6.9 7.22 7.5 7.81 8.12 8.43 8.77 9.08 9.41 9.72 10.03 10.35 10.67 10.99 11.32 11.63 11.95 12.28 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns DELAY [6..0] 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4AH 4BH 4CH 4DH 4EH 4FH Delay 12.53 12.84 13.15 13.46 13.8 14.11 14.43 14.74 15.04 15.35 15.66 15.96 16.31 16.61 16.93 17.25 17.52 17.83 18.14 18.45 18.79 19.1 19.42 19.74 19.97 20.29 20.63 20.94 21.28 21.58 21.91 22.24 22.58 22.91 23.25 23.55 23.9 24.2 24.52 24.87 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns DELAY [6..0] 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5AH 5BH 5CH 5DH 5EH 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6AH 6BH 6CH 6DH 6EH 6FH 70H 71H 72H 73H 74H 75H 76H 77H Delay 25.16 25.47 25.78 26.09 26.43 26.74 27.06 27.37 27.63 27.94 28.25 28.56 28.9 29.22 29.55 29.87 30.18 30.49 30.8 31.11 31.45 31.76 32.08 32.39 32.69 32.99 33.3 33.61 33.95 34.26 34.58 34.91 35.17 35.48 35.79 37.06 36.44 36.74 37.06 37.38 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
18
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
DELAY [6..0] 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH Delay 37.67 37.98 38.29 38.6 38.94 39.25 39.57 39.86 Unit ns ns ns ns ns ns ns ns
Note 1: Note 2:
DELAY [6..0] is fixed at 00H, when CNTSEL is "H" or "open". This delay value is typical value at Ta = 25C. And the value varies by the ambient temperature and the module itself. Please set up a preferable display position. See the following references. <1> Variation of CLK delay by temperature drift. (only reference) The temperature constant of CLK delay is 0.2%/C. Calculated example: In case of delay time is 20ns at Ta = 25C; (a) In case Ta rising to 50C. Increase of delay time (50C - 25C) x 0.002 x 20 ns = +1 ns So, the total delay time is 21 ns at Ta = 50C. (b) In case Ta falling to 0C. Decrease of delay time (0C - 25C) x 0.002 x 20 ns = -1 ns So, the total delay time is 19 ns at Ta = 0C <2> Variation of CLK delay time against each LCD module. (Only reference) -10.5% to +14.4%
Table 5. CLK reverse signal
CKS FUNCTION DATA is sampled on rising edge of CLK. 0
DATA is sampled on falling edge of CLK. 1
Note 1:
CKS is "0", when CNTSEL is "H" or "open."
Data Sheet EN0491EJ1V0DS00
19
NL128102AC23-02
Table 6. Horizontal display position (HD8 to HD0 : 9 bit)
HD8 0 0 * * 0 0 0 * * 1 1 1 HD7 0 0 * * 0 1 1 * * 1 1 1 HD6 0 0 * * 1 0 0 * * 1 1 1 HD5 0 0 * * 1 0 0 * * 1 1 1 HD4 0 0 * * 1 0 0 * * 1 1 1 HD3 0 0 * * 1 0 0 * * 1 1 1 HD2 0 0 * * 1 0 0 * * 1 1 1 HD1 0 0 * * 1 0 0 * * 0 1 1 HD0 0 1 * * 1 0 1 * * 1 0 1 Horizontal position [CLK] Prohibit Prohibit * * Prohibit 64 65 * * 509 510 511 Note 1
Note 1: Note 2:
The number of CLK between Hsync-fall and RGB data valid. Horizontal position is set at 360 CLK, when CNTSEL is "H" or "open".
Table 7. CLK counts of horizontal period (HSE10 to HSE0 : 11bit)
HSE10 0 0 * * * 1 1 1 HSE9 0 0 * * * 1 1 1 HSE8 0 0 * * * 1 1 1 HSE7 0 0 * * * 1 1 1 HSE6 0 0 * * * 1 1 1 HSE5 0 0 * * * 1 1 1 HSE4 0 0 * * * 1 1 1 HSE3 0 0 * * * 1 1 1 HSE2 0 0 * * * 1 1 1 HSE1 0 0 * * * 0 1 1 HSE0 0 1 * * * 1 0 1 CLK count 0 1 * * * 2045 2046 2047 Note 1
Note 1: Note 2: Note 3:
The number of CLK between Hsync signals. CLK number is set 1688 CLK, when CNTSEL is "H" or "open". If setting value is different from actual input signal, it causes to malfunction.
Table 8. CLK frequency select (MOD1 to MOD0 : 2 bit)
MOD1 0 0 1 1 MOD0 0 1 0 1 CLK frequency [MHz] 90 to 135 65 to 90 50 to 65 20 to 50
Note 1: Note 2:
Set complying with input CLK frequency. CLK frequency is set 90 to 135 MHz, when CNTSEL is "H" or "open".
20
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
Table 9. Color control data (DAD7 to DAD0 : 8 bit)
DAD7 0 0 * * 0 1 1 * * 1 1 1 DAD6 0 0 * * 1 0 0 * * 1 1 1 DAD5 0 0 * * 1 0 0 * * 1 1 1 DAD4 0 0 * * 1 0 0 * * 1 1 1 DAD3 0 0 * * 1 0 0 * * 1 1 1 DAD2 0 0 * * 1 0 0 * * 1 1 1 DAD1 0 0 * * 1 0 0 * * 0 1 1 DAD0 0 1 * * 1 0 1 * * 1 0 1 Adjusting value 0 1 * * 127 128 129 * * 253 254 255
Note 1: Note 2: Note 3:
Adjust value for selecting function above table. 10. Different D/A-range depends on function selected. See more detail Color control function and graph image.
Table 10. Color adjust select data (DAA3 to DAA0 : 4 bit)
DAA3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DAA2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 DAA1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 DAD0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Function Prohibit Main contrast Prohibit Prohibit Sub-contrast R Sub-contrast G Sub-contrast B Sub-brightness R Sub-brightness G Sub-brightness B Prohibit Prohibit Prohibit Prohibit Prohibit Prohibit
Note 1:
See more detail Color control function and graph image.
Data Sheet EN0491EJ1V0DS00
21
NL128102AC23-02
SERIAL COMMUNICATION TIMINGS
CNTDAT
INVALID
D0
D1
D2
D44
CNTCLK CNTSTB CNTSTB2
Parameters CLK pulse-width CLK frequency DATA set-up-time DATA hold-time Latch pulse-width Latch set-up-time Rise/fall time
Symbols twck fclk tdst tdhl twlp t1st tr, tf
Min. 50 - 50 50 50 50 -
Max. - 5 - - - - 50
Unit ns MHz ns ns ns ns ns
Remark CNTCLK
CNTDAT
CNTSTB CNTSTB2 CNT xxx
Vsync thv Hsync 0 1 2 3
..
..
ViH CNTDAT 50 % ViL tdst tdhl twck CNTCLK 50 % 10 % tr t1st CNTSTB 50 % CNTSTB2 ViL 90 % ViH
ViL tf twlp ViH
22
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
EXPANSION FUNCTION (1) How to use expansion mode Expansion mode is a function to expand screen. For example, VGA signal has 640 x 480 pixels. But, if the display data can expanded to 2.0 times vertically and horizontally,VGA screen image can be displayed fully on the screen of SXGA resolution. This LCD module has the function that expands vertical direction as shown in the following table. And expanding horizontal direction is possible by setting input CLK frequency equivalent to the magnification. It is necessary to make this CLK outside of this LCD module. Please adopt this mode after evaluating display quality, because the appearance in the expansion mode is happened to be relatively bad in some cases. The followings show the display magnifications for each mode.
Magnification Input display SXGA XGA SVGA VGA VGA text MAC SUN Number of pixels Vertical 1280 x 1024 1024 x 768 800 x 600 640 x 480 720 x 400 832 x 624 1152 x 900 1 1.25 1.6 2.0 2.5 1.6 1.1 Horizontal Note 1 1.25 1.6 2.0 1.7 1.5 1.1
Note The horizontal magnification multiples the input clock (CLK). Input CLK = system CLK x horizontal magnification. Example In case of SXGA and VGA, CLK frequency can be decided as follows. SXGA: (system CLK (108.0 MHz)) x 1.0 = 108.0 MHz. VGA : (system CLK (25.175 MHz)) x 2.0 = 50.35 MHz.
Data Sheet EN0491EJ1V0DS00
23
NL128102AC23-02
(2) Setting serial data for expansion
Input signal Horizontal System CLK [MHz] Count Number [CLK] (A) SXGA (1280 x 1024) 108.0 117.0 125.0 130.076 135.0 135.0 63.981 71.691 75.120 76.968 78.125 79.976 48.363 56.476 60.023 49.725 60.02 67.189 71.204 72.000 72.005 75.025 60.004 70.069 75.029 74.5 1688 1632 1664 1690 1728 1688 1344 1328 1312 1152 DSP [CLK] Vertical Count Number [H] - 1066 1067 1055 1069 1085 1066 806 806 800 667 DSP [H] Module serial-data setting HSE HD VD
Mode
Hsync [kHz]
Vsync [Hz]
Calculation formula (B) x (A) x Ver.magni Hor.magni (A) x 1 (B) x 1
(B) 360 336 352 378 384 392 296 280 272 288
(C) 41 41 28 42 58 41 35 35 31 42
= (C)
XGA 65* (1024 x 768) 75* 78.75* MAC (832 x 624) SVGA (800 x 600) 57.283*
(A) x 1.25
(B) x 1.25
(A) x 1.5 (A) x 1.6
(B) x 1.5 (B) x 1.6
36* 40* 50* 49.5* 25.175* 31.5* 31.5* 30.24* 28.322*
35.156 37.879 48.077 46.875 31.469 37.861 37.5 35.0 31.469
56.25 60.317 72.188 75 59.94 72.809 75 66.667 70.087
1024 1056 1040 1056 800 832 840 864 900
200 216 184 240 144 168 184 160 153
625 628 666 666 525 520 500 525 449
24 27 29 24 35 31 19 42 37
= (C)
VGA (640 x 480)
(A) x 2.0
(B) x 2.0
VGA text (720 x 400)
(A) x 1.7 (A) x 1.1
(B) x 1.7 (A) x 1.1
SUN 94.500* (1152 x 900)
61.845
66.003
1528
336
937
35
*: Standard timings (Please set them up properly for correct expansion). Note 1. DSP = Display Start Period. DSP is total of "pulse-width" and "back-porch". 2. HD and VD are approximate value. Set HD and VD in case of adjusting display to the screen center. 3. The pulse-width of Hsync, Vsync and Back-porch are the same as SXGA-mode (Standardmode).
24
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
(3) Display Image 1. XGA mode (1024 x 768)
SXGA (1,280 x 1,024)
Horizontal : x 1.25 (1,280 pixels) Vertical : x 1.25 (960 pixels) Black display area
2. SVGA mode (800 x 600)
SXGA (1,280 x 1,024)
Horizontal : x 1.6 (1,280 pixels) Vertical : x 1.6 (960 pixels) Black display area
3. VGA mode (640 x 480)
SXGA (1,280 x 1,024)
Horizontal : x 2.0 (1,280 pixels) Vertical : x 2.0 (960 pixels) Black display area
4. VGA text mode (720 x 400)
Horizontal : x 1.7 (1,224 pixels) Vertical : x 2.5 (1,000 pixels)
SXGA (1,280 x 1,024) Black display area
5. 832 x 624 MAC mode (832 x 624)
Horizontal : x 1.5 (1,248 pixels) Vertical : x 1.6 (998 pixels)
SXGA (1,280 x 1,024) Black display area
Data Sheet EN0491EJ1V0DS00
25
NL128102AC23-02
6. SUN mode (1152 x 900)
SXGA (1,280 x 1,024)
Horizontal : x 1.1 (1,152 pixels) Vertical : x 1.1 (990 pixels) Black display area
26
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
COLOR CONTROL FUNCTION AND GRAPH IMAGE This LCD module can adjust the following functions by serial data input (table. 1) (1) Main contrast (2) Sub-contrast each R, G, B : : See table 9, 10 and COLOR CONTRAOL FUNCTION AND GRAPH IMAGE
(3) Sub-brightness each R, G, B : (1) Main contrast
Main contrast is adjusted R/G/B contrast at the same time. Contrast controls the amplitude of input video signal. Default value: 128, Valid range: 78 to198 Contrast minimum : Contrast maximum : 198 78
ADJSEL = "H" or "Open": Maincontrast = 128 (2) Sub-contrast R, G, B Sub-contrast can adjust each R/G/B, Contrast controls the amplitude of input video signal. Default value: 128, Valid range: 78 to198 Contrast minimum : Contrast maximum: 198 78
ADJSEL = "H" or "Open": Maincontrast = 128 (3) Sub-brightness R, G, B Sub-brightness can adjust each R/G/B. Brightness adjusts the black level of input video signal. Default value: 128, Valid range: 55 to163 Brightness minimum : Brightness maximum : 55 163
ADJSEL = "H" or "Open": Maincontrast = 128 Note 1: Note 2: If use to go over above valid range, LCD module will not be destroyed. However LCD will be inferiority. Please keep value of valid range. Although set up the same value for each LCD, color will be caused the different. And also, will be afraid to deviate values from optical characteristics. Please adopt this functions evaluating display quality.
Data Sheet EN0491EJ1V0DS00
27
NL128102AC23-02
GRAPH IMAGE * Main contrast & Sub contrast
Relative luminance 1 Relative luminance 1 Relative luminance 1
0 Black Gray scale White
0 Black Gray scale White
0 Black Gray scale White
Main contrast MAX Sub contrast MIN DEFAULT MAX DEFAULT MIN
* Sub brightness
Relative luminance 1 Relative luminance 1 Relative luminance 1
0 Black Gray scale White
0 Black Gray scale White
0 Black Gray scale White
Sub brightness MIN DEFAULT MAX
28
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
OSD FUNCTION OSD (On Screen Display) is the function to display the other digital data on the input analog input data. Possible to display 1 bit data for each R/G/B color (8 colors). OSD valid for the period of OSDENI OSDRI, OSDGI, OSDBI: digital data for OSD OSDENI = "H" : OSDENI = "L" : OSD signal is valid OSD signal is not valid
OSD is the sub-display for function-control and the display quality will be not guaranteed. Please adopt the OSD image evaluating display quality. OSD image
Analog R, G, B
OSDENI
OSDRIO, GI, BI
Real display image
Data Sheet EN0491EJ1V0DS00
29
NL128102AC23-02
OUTSIDE CONTROL FOR LUMINANCE Outside control is valid, when PWSEL = "L" and input signal for BRTP. Luminance can be controlled by the duty value of input signal for BRTP. Duty = 100%: luminance is maximum. Duty = 20% : luminance is minimum. Timing for BRTP
tPW tHPW ViH 50 % ViL tLPW
BRTP
Parameters Frequency OFF section
Symbols L/tPW tLPW
Min. 185 -
Typ. - - - - -
Max. 340 50
Unit Hz Ms
Remark - When tLPW is more than 50ms, the lamps are turned off. At max. luminance (100%) - -
Pulse-width Input voltage
tHPW/tPW ViL ViH
20 0 4.5
100 0.6 5.25
% V V
Regarding setup for frequency, please refer to the below method. Setup frequency = Vsync frequency x (n + 0.25) or (n + 0.75) Please adopt the frequency evaluating the display quality, because the display will be disturbed depending on the frequency.
30
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
INPUT SIGNAL TIMINGS (1) SXGA Mode (Standard)
Name CLK Frequency Symbol 1/tc Min. 95.0 - - 0.4 12.3 - - - - 10 - 16 1.0 94 1.8 Typ. 108.0 9.3 - 0.5 15.630 1688 11.852 1280 0.444 48 1.037 112 2.296 248 - Max. 135.0 - 10 0.6 17.0 - - - - - - - - - - Unit MHz ns ns - Remark SXGA standard
Rise/Fall Pulse-width Hsync Period
tcrf tc/tcl th
- - 63.981 kHz (typ.)
s CLK s CLK s CLK s CLK s CLK s
Display
thd
-
Front-porch
thf
-
Pulse-width
thp
-
Back-porch
thb
Note 1
Pulse-width +Back-porch V-Hsync timing hold/setup time Rise/Fall Vsync Period
thbp
-
thvh thvs thrf tv
4 1 - 13.3 - - - - 1 - 2 - 5
- - - 16.661 1066 16.005 1024 0.016 1 0.047 3 0.594 38
- - 10 18.5 - - - - - - - - -
CLK CLK ns ms H ms H ms H ms H ms H
- - - 60.020 Hz (typ.)
Display
tvd
-
Front-porch
tvf
-
Pulse-width
tvp
-
Back-porch
tvb
-
Note 1: Note 2:
Minimum value of Back-porch (thb) must be satisfied with both 1.0 s and 94 CLK. Typical value should be set in default of CNTSEL input. When CNTSEL is "H" or "Open", display control mode is default.
Data Sheet EN0491EJ1V0DS00
31
NL128102AC23-02
tv tvp
Vsync tvb tvd tvf
Display period
th thp
Hsync thb thd thbp Display period thf
Vsync
ViH
thvh Hsync
thvs
32
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
TIMING FOR GENERATING CLAMP SIGNAL INTERNALLY
Hsync Display period tA CLAMP tB
MOD1 0 0 1 1
MOD2 0 1
tA [CLK]
tB [CLK] 41 27
2 0 1 20 15
Note 1:
Exclude noises on analog R, G, B signal, because analog R, G, B signals are the black level reference during CLAMP = "L". If noises are on the analog signals, luminance level of display is changed and the display becomes bad.
TIMING FOR INPUTTING CLAMP SIGNAL FROM OUTSIDE
Hsync Display period tA CLAMP tB
tC
ITEMS tA tB tC
Min. 0.1 0.3 0.2
Typ. - - -
Max. - - -
Unit
Remarks - - -
s s s
Note 1:
Exclude noises on analog R, G, B signal, because analog R, G, B signals are the black level reference during CLAMP = "L". If noises are on the analog signals, luminance level of display is changed and the display becomes bad.
Note 2:
Attention for using Sync On Green signal Clamp signals must be input during black level period as next page. If Clamp signals are input during other period, the display becomes un-uniformity.
Data Sheet EN0491EJ1V0DS00
33
NL128102AC23-02
Sync on Green input signal timings
Hsync <1> <2> <3> Vsync <1> <2> <4> <2> <1> Display level Sync level <2> <1>
Display level Sync level
<1>: Display period <2>: Black level period <3>: Hsync period <4>: Vsync period
34
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
INPUT SIGNAL AND DISPLAY POSITION (1) SXGA Standard Timing Pixels
D (0, 0) D (1, 0) D (2, 0) * * * * D (1023, 0) D (0, 1) D (1, 1) D (2, 1) * * * * D (1023, 1) D (0, 2) D (1, 2) D (2, 2) * * * * D (1023, 2) *** *** *** *** * * * * *** *** *** *** D (0, 1279) D (1, 1279) D (2, 1279) * * * * D (1023, 1279)
tvp
tvb
Vsync
1 line
Hsync SXGA mode (VD = 41) R G B 0 1 2 3 4 5 *** 41 42 43
Invalid
Valid D (0, X), D (1, X), D (2, X)
thp
thb
Hsync
1clk
CLK SXGA mode (HD = 361) R G B 0 1 2 3 4 5 *** 361 362 tda Valid D (X, 0), D (X, 1), D (X, 2) 363
Invalid
Note 1:
The tda should be more than 4 ns.
Data Sheet EN0491EJ1V0DS00
35
NL128102AC23-02
OPTICAL CHARACTERISTICS (Ta = 25C, VDD = 12 V, VDDB = 12 V)
Item Contrast ratio Symbol CR Condition = 2.2 viewing angle R = 0, L = 0, D = 0 White/Black, at center White, at center White Min. 100 Typ. 200 Max. - Unit - Remark Note 1
Luminance Luminance uniformity
Lvmax -
150 -
200 1.20
- 1.30
cd/m -
2
Note 2 Note 3
Reference data (Ta = 25C, VDD = 12 V, VDDB = 12 V)
Item Best contrast ratio Viewing angle range Symbol CR Condition Min. - 50 50 CR > 10, R = 0, L = 0 35 30 Typ. 250 60 60 50 45 59 Max. - - - - - - Unit - deg. deg. deg. deg. % - Remark - Note 4
R = 0, L = 0, U = 0, D = 10
CR > 10, U = 0, D = 0
R L U D
Color gamut
C
R = 0, L = 0, U = 0, D = 0, at center, to NTSC
White 100% to Black 10% Maximum luminance: 100 % ACA = H ACA = L
50
Response time Luminance control range
Ton -
- - -
7 3 0 to 1 0 0 6 0 to 1 0 0
12 - -
ms %
Note 5 -
Notes 1. The contrast ratio is calculated by using the following formula. Luminance with all pixels in "white" Luminance with all pixels in "black"
Contrast ratio (CR) =
The Luminance is measured in darkroom. 2. The luminance is measured after 20 minutes from the module works, with all pixels in white. Typical value is measured after luminance saturation. Display mode: VESA SXGA - 75 Hz
Photodetector (TOPCON BM-5A)
1
LCD
50 cm
36
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
3. The luminance is measured at near the five points shown below.
Column 213 640 1067
Row
1 3 4
2
171 512
5
853
Luminance uniformity is calculated using the following formula. Maximum luminance Minimum luminance
Luminance uniformity =
4. Definitions of viewing angle are as follows.
Pependicular
L-
-x
12 o'clock
D-
U+
R+
+y
-y
+x
5. Definition of response time is as follows. Photo-detector output signal is measured when the luminance changes "white" to "black". Response times are Ton and Toff of the photo-detector output amplitude. Ton is the time between 100 % and 10 %. Toff is the time between 0 % and 90 %.
100 % 90 % Luminance
White
Display color
10 % 0% ton toff
Black Time
Data Sheet EN0491EJ1V0DS00
37
NL128102AC23-02
RELIABILITY TEST
Test item High temperature/humidity operation Note 1 Test condition 50 2C, 85% relative humidity 240 hours Display data is black. <1> 0C 3C *** 1 hour 55C 3C *** 1 hour <2> 50 cycles, 4 hours/cycle <3> Display data is black. <1> -20C 3C *** 30 minutes 60C 3C *** 30 minutes <2> 100 cycles <3> Temperature transition time within 5 minutes <1> 5 - 100 Hz, 2G 1 minute/cycle X, Y, Z direction <2> 50 times each direction <1> 30 G, 11 ms X, Y, Z direction <2> 3 times each direction 150 pF, 150 , 10 kV 9 places on a panel 10 times each place at one-second intervals 15 kinds of dust (JIS Z 8901) Hourly 15 seconds stir, 8 times repeat
Heat cycle (operation)
Note 1
Thermal shock (non-operation)
Note 1
Vibration (non-operation)
Notes 1, 2
Mechanical shock (non-operation)
Notes 1, 2
ESD (operation)
Notes 1, 3
Dust (operation)
Note 1
Notes 1. Display function is checked by the same condition as LCD module out-going inspection. 2. Physical damage. 3. Discharge points "z" are shown in the figure.
38
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
GENERAL CAUTIONS
Next figures and sentence are very important. Please understand these contents as follows.
This figure is a mark that you will get hurt and/or the module will have damages when you make a mistake to operate.
CAUTION
This figure is a mark that you will get an electric shock when you make a mistake to operate.
This figure is a mark that you will get hurt when you make a mistake to operate
CAUTION
Do not touch an inverter, on which is stuck a caution label, while the LCD module is under the operation, because of dangerous high voltage.
(1) Caution when taking out the module a) Pick the pouch only, in taking out module from a carrier box. (2) Cautions for handling the module a) As the electrostatic discharges may break the LCD module, handle the LCD module with care against electrostatic discharges. b) c) As the LCD panel and backlight element are made from fragile glass material, impulse and pressure to the LCD module should be avoided. As the surface of polarizer is very soft and easily scratched, use a soft dry cloth without chemicals for cleaning. d) Do not pull the interface connectors in or out while the LCD module is operating. e) Put the module display side down on that horizontal plane. f) Handle connectors and cables with care. the LCD panel would be damaged. h) Do not put front side (display surface side) of the module on a desk or a table for a long time, because the display may become un-uniformity. i) The torque to mounting screw should never exceed 0.392 N*m (4 kgf*cm). g) When the module is operating, do not lose CLK, Hsync or Vsync signal. If any one of these signals is lost,
(3) Cautions for the atmosphere a) Dew drop atmosphere must be avoided. b) Do not store and/or operate the LCD module in a high temperature and/or high humidity atmosphere. Storage in an electro-conductive polymer packing pouch and under relatively low temperature atmosphere is recommended. c) This module uses cold cathod fluorescent lamps. conspicuously at low temperature. d) Do not operate the LCD module in a high magnetic field. Therefore, the life time of lamps becomes short
Data Sheet EN0491EJ1V0DS00
39
NL128102AC23-02
(4) Caution for the module characteristics a) Do not apply fixed pattern data signal for a long time to the LCD module at product aging. Applying fixed pattern for a long time may cause image sticking. b) This module has the retardation film, which may cause the variation of the color hue in the different viewing angles. The ununiformity may appear on the screen under the high temperature operation. c) The noise from the inverter circuit may be observed in the luminance control mode. This is neither defects nor malfunctions. (5) Other cautions a) Do not disassemble and/or reassemble LCD module. b) Do not readjust variable resistors or switches, etc. c) When returning the module for repair or etc, please pack the module not to be broken. We recommend the original shipping packages. d) In case that the scan converter is used to convert VGA signal to NTSC, it is recommended using the framememory type, not the line-memory. Liquid Crystal Display has the following specific characteristics. There are not defects or malfunctions. * The display condition of LCD module may be affected by the ambient temperature. * The LCD module uses cold cathode tube for backlighting. Optical characteristics, like luminance or uniformity, will change during time. * Uneven brightness and/or small spots may be noticed depending on different display patterns.
40
Data Sheet EN0491EJ1V0DS00
NL128102AC23-02
OUTLINE DRAWING: Front View (Unit: mm)
105.35 0.7
6.2 0.3 13.75 0.1 6 0.3
ACTIVE AREA 305.28 x 244.224
168.75 0.7
350 0.6 337.5 0.3 310 0.3
ACTIVE AREA CENTER
6 0.3
4- 3.5 0.1
Remark The torque to mounting screw should never exceed 0.392 * Nm (4 kgf * cm).
Data Sheet EN0491EJ1V0DS00
10 0.3
6 0.3
6 0.3
18.4 0.3 247.5 0.3
5 0.3
19.1 0.3 31.5 0.3 8.5 0.2 6.3 0.3
227.7 0.3
248.9 0.3 6 0.3 10 0.3 5 0.3
284.8 0.6
41
21.8
4-3.4 0.3 4-2.7 0.3
5
31 1
CN8
THE TFT COLOR LCD
CONTAINS COLD CATHODE
FOLLOW LOCAL ORDINANCES
CN7
FLUORESCENT LAMPS. PLEASE
Name 154BLM-1 B/L Lot No. Label 69 1 CN101
Flexible Printed Circuit
OR REGULATIONS FOR ITS
DISPOSAL.
134.9 1
CN102
CN9
CN1
24.6
240.2
130
214 1
182 1
CN103
CN3
5
24.6
21.5 (MAX)
19.2 (MAX)
1.2
NL128102AC23-02
Note: The tolerance of the dimensions that are not shown is 0.5 mm.
10.8
Remark The torque to mounting screw should never exceed 0.392 * Nm (4 kgf * cm).
CN104
Data Sheet EN0491EJ1V0DS00
CN2
42
113.7 1 CRT I/F 8.4
Printed Circuit Board
OUTLINE DRAWING: Rear View (Unit: mm)
INVERTER
Material Information Light gide:>PMMA<
11.9
61.8 1
8.4
NL128102AC23-02
[MEMO]
Data Sheet EN0491EJ1V0DS00
43
NL128102AC23-02
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents. Copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its Electronic Components, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC Electronic Components, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
DATA SHEET

▲Up To Search▲

Price & Availability of NL128102AC2302

	To Download NL128102AC2302 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .